本文共 4328 字，大约阅读时间需要 14 分钟。

   
   
    
    
    
     
General Purpose Timer
    
    
     
Overview
     
General Purpose Timer (GPT) is a high-precision delay module widely used in embedded systems. This document provides a detailed explanation of its architecture, functionality, and usage.
    
    
     
Structure
     
The GPT module consists of a 32-bit counter, a 12-bit prescaler, and multiple input/output channels for capturing and comparing events. It can be programmed in two modes: Restart and Free-Run.
    
    
     
Configuration
    
    
     
Clock Sources
     
The module supports five different clock sources, selectable via the CLKSRC bit in the CR register. Each source provides a different frequency range, allowing flexibility in system configuration.
     
        00000000
        00000001
        00000010
        00000011
      
       
        
 CLKSRC Value
        
 Clock Source
       
      
      
       
       
       
        
Disabled
        
       
       
       
       
        
ipg_clk (default)
        
       
       
       
       
        
ipg_clk_highfreq
        
       
       
       
       
        
ipg_clk_32k
        
       
      
     
    
    
     
Prescaler
     
The prescaler is a 12-bit register (PR) that divides the clock source to achieve the desired frequency. It accepts values from 1 to 0xFFF, corresponding to 1 to 4096 divisions.
    
    
     
Operation Modes
     
      
       
Restart Mode
       
In this mode, the counter resets to 0 when the stored value matches the current count. This mode is ideal for applications requiring precise control over the delay.
      
      
       
Free-Run Mode
       
In this mode, the counter continues counting after matching, resetting only after reaching 0xFFFFFFFF. This mode is suitable for applications requiring continuous counting without interruption.
      
     
     
      
Registers
     
     
      
CR Register
      
The Configuration Register (CR) controls various aspects of the GPT, including clock source selection, prescaler configuration, and mode setting. The key bits are as follows:
      
       
SWR (bit15): Soft reset, reusable as a watchdog timer
       
FRR (bit9): Mode selection (0 for Restart, 1 for Free-Run)
       
ENMOD (bit1): Enable/disable the module
       
EN (bit0): Transition directly to Free-Run mode when set
      
     
     
      
SR Register
      
Status Register (SR) provides feedback on the module's current state, including overflow and input capture event flags.
     
     
      
       
ROV (bit5): Overflow flag for Free-Run mode
       
IF2-IF1 (bits4-3): Input capture flags (2 channels)
       
OF3-OF1 (bits2-0): Output compare flags (3 channels)
      
     
    
    
     
OCR Registers
     
Output Compare Registers (OCR) store the values used for comparing the counter.
    
    
     
Each of the three OCR registers (OCR0, OCR1, OCR2) can store a 32-bit value for comparison.
    
   
   
    
Counter Register
    
GPTx_CNY is a read-only 32-bit register that holds the current count value.
   
   
    
Use this register to monitor the elapsed time or verify delays without disrupting the GPT operation.
   
   
    
Implementation
   
   
    
Code Structure
    
     
bsp_delay.h: Header file containing API declarations
     
bsp_delay.c: Source file implementing the delay functions
     
main.c: Example project using the GPT module
    
   
   
    
API Functions
    
delay_init()
    
Initializes the GPT module, setting it to the default clock source, a 66MHz prescaler, and enables the counter.
   
   
    
delayus()
    
Microsecond-level delay function using the GPT counter for high precision timing.
   
   
    
delayms()
    
Millisecond-level delay function, optimized for commonly used delays in embedded systems.
   
   
    
Implementation Details
   
   
    
Registers Configuration
    
By adjusting the configuration registers (CR, PR, SR, OCR, and CNY), developers can fine-tune the GPT module for specific applications, ensuring accurate and reusable delays.
   
   
    
Conclusion
    
The General Purpose Timer offers a versatile solution for high-precision delays in embedded systems. Proper configuration, initialization, and code optimization are essential to maximize its capabilities.
   
   
    
References
   
This document builds on the fundamentals from the "i.MX 6UltraLite Applications Processor Reference Manual," with additional insights and practical implementation examples.